Logic Node

Samsung’s 3nm process utilizes gate-all-around (GAA) technology with special nanosheets that widen channels and squeeze in even greater improvements in PPA.

The first 4nm process, SF4E was tailor made to power mobile products and began mass production in 2021.

5nm enables HPC systems to do more than ever, with less power than ever, lowering your energy footprint even as you break barriers in performance.

7nm introduced extreme ultraviolet (EUV) lithography to the world for the first> time, putting silicon wafers through an exposure process that is far nimbler than conventional immersion ArF.

Samsung’s 8nm RF is a one-chip solution ideal for the rapid information sharing of 5G, delivering long-lasting power and crystal-clear signal quality from compact mobile devices.

FD-SOI (Fully Depleted – Silicon on Insulator) is a process that overcomes some of the limitations of Bulk CMOS technology with improved performance, power and area.

Samsung’s integration of 3D FinFET technology into its 14nm process represented a light-speed jump in the foundry industry, raising performance, boosting power efficiency and widening scaling capabilities.

The 28nm Radio Frequency (RF) process lets chip designers enhance connectivity-focused applications with advanced RF functions, with 28RF process design kits (PDK) and verification methods.

Samsung’s 70nm process improved speed and lowered power demand over 90nm, while increasing yield rates to deliver an even higher number of good dies per wafer.

90nm system-on-chip design marked Samsung’s first leap into nanotechnology providing a low power option with reduced dynamic power.

130nm process is a go-to option for wearable and IoT devices, with the power management that keeps devices working their best on less power.

Samsung’s 180nm processes offer unrivaled accuracy and reliability, with ideal support for analog applications.